Texas Instruments TMS320C645X Uživatelský manuál stáhnout pdf (Strana 16)

Registers

General-Purpose Input/Output (GPIO)16 SPRU724

5.1 Interrupt Per-Bank Enable Register (BINTEN)

To use the GPIO pins as sources for CPU interrupts and EDMA events, bit 0

in the bank interrupt enable register (BINTEN) must be set. BINTEN is shown

in Figure 3 and described in Table 3.

Figure 3. Interrupt Per-Bank Enable Register (BINTEN)

31 10

Reserved

R-0 RW-0

Legend: R = Read only; R/W = Read/Write; -n = value after reset

Table 3. Interrupt Per-Bank Enable Register (BINTEN) Field Descriptions

Bit Field Value Description

31−1 Reserved 0 Reserved. The reserved bit location is always read as 0. A value written to

this field has no effect.

0 EN Enables all GPIO pins as interrupt sources to the DSP CPU.

0 Disables GPIO interrupts

1 Enables GPIO interrupts

1 2 ... 11 12 13 14 15 16 17 18 19 20 21 ... 26 27

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Texas Instruments TMS320C645X Uživatelský manuál Strana 16