Texas Instruments TMS320C64x DSP Uživatelský manuál Strana 55

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Video Port Control Registers
Video Port2-22 SPRU629
Table 28. Video Port Interrupt Enable Register (VPIE) Field Descriptions (Continued)
Bit DescriptionValuesymval
field
20 VINTB1 Channel B field 1 vertical interrupt enable bit.
DISABLE 0 Interrupt is disabled.
ENABLE 1 Interrupt is enabled.
19
SERRB Channel B synchronization error interrupt enable bit.
DISABLE 0 Interrupt is disabled.
ENABLE 1 Interrupt is enabled.
18
CCMPB Capture complete on channel B interrupt enable bit.
DISABLE 0 Interrupt is disabled.
ENABLE 1 Interrupt is enabled.
17
COVRB Capture overrun on channel B interrupt enable bit.
DISABLE 0 Interrupt is disabled.
ENABLE 1 Interrupt is enabled.
16
GPIO Video port general purpose I/O interrupt enable bit.
DISABLE 0 Interrupt is disabled.
ENABLE 1 Interrupt is enabled.
15
Reserved 0 Reserved. The reserved bit location is always read as 0. A value
written to this field has no effect.
14 DCNA Display complete not acknowledged bit.
DISABLE 0 Interrupt is disabled.
ENABLE 1 Interrupt is enabled.
13
DCMP Display complete interrupt enable bit.
DISABLE 0 Interrupt is disabled.
ENABLE 1 Interrupt is enabled.
12
DUND Display underrun interrupt enable bit.
DISABLE 0 Interrupt is disabled.
ENABLE 1 Interrupt is enabled.
11
TICK System time clock tick interrupt enable bit.
DISABLE 0 Interrupt is disabled.
ENABLE 1 Interrupt is enabled.
For CSL implementation, use the notation VP_VPIE_field_symval
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