Texas-instruments TMS320C6454 Uživatelský manuál

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PRODUCT PREVIEW
1 TMS320C6454 Fixed-Point Digital Signal Processor
1.1 Features
TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A APRIL 2006 REVISED DECEMBER 2006
32-Bit DDR2 Memory Controller (DDR2-533
High-Performance Fixed-Point DSP (C6454)
SDRAM)
1.39-, 1.17-, and 1-ns Instruction Cycle Time
EDMA3 Controller (64 Independent Channels)
720-MHz, 850-MHz, and 1-GHz Clock Rate
Eight 32-Bit Instructions/Cycle
32-/16-Bit Host-Port Interface (HPI)
8000 MIPS/MMACS (16-Bits)
32-Bit 33-/66-MHz, 3.3-V Peripheral Component
Commercial Temperature [0°C to 90°C]
Interconnect (PCI) Master/Slave Interface
Conforms to PCI Specification 2.3
TMS320C64x+™ DSP Core
Dedicated SPLOOP Instruction
One Inter-Integrated Circuit (I
2
C) Bus
Compact Instructions (16-Bit)
Two McBSPs
Instruction Set Enhancements
10/100/1000 Mb/s Ethernet MAC (EMAC)
Exception Handling
IEEE 802.3 Compliant
TMS320C64x+ Megamodule L1/L2 Memory
Supports Multiple Media Independent
Architecture:
Interfaces (MII, GMII, RMII, and RGMII)
256K-Bit (32K-Byte) L1P Program Cache
8 Independent Transmit (TX) and
[Direct Mapped]
8 Independent Receive (RX) Channels
256K-Bit (32K-Byte) L1D Data Cache
Two 64-Bit General-Purpose Timers,
[2-Way Set-Associative]
Configurable as Four 32-Bit Timers
8M-Bit (1048K-Byte) L2 Unified Mapped
16 General-Purpose I/O (GPIO) Pins
RAM/Cache [Flexible Allocation]
System PLL and PLL Controller
256K-Bit (32K-Byte) L2 ROM
Secondary PLL and PLL Controller, Dedicated
Time Stamp Counter
to EMAC and DDR2 Memory Controller
Endianess: Little Endian, Big Endian
IEEE-1149.1 (JTAG™)
64-Bit External Memory Interface (EMIFA)
Boundary-Scan-Compatible
Glueless Interface to Asynchronous
697-Pin Ball Grid Array (BGA) Package
Memories (SRAM, Flash, and EEPROM) and
(ZTZ or GTZ Suffix), 0.8-mm Ball Pitch
Synchronous Memories (SBSRAM and ZBT
SRAM)
0.09- µ m/7-Level Cu Metal Process (CMOS)
Supports Interface to Standard Sync
3.3-/1.8-/1.5-V I/Os, 1.25-/1.2-V Internal
Devices and Custom Logic (FPGA, CPLD,
Pin-Compatible with the TMS320C6455
ASICs, etc.)
Fixed-Point Digital Signal Processor
32M-Byte Total Addressable External
Memory Space
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this document.
All trademarks are the property of their respective owners.
PRODUCT PREVIEW information concerns products in the
Copyright © 2006–2006, Texas Instruments Incorporated
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
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Strany 1 - PRODUCT PREVIEW

www.ti.comPRODUCT PREVIEW1 TMS320C6454 Fixed-Point Digital Signal Processor1.1 FeaturesTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL

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www.ti.comPRODUCT PREVIEW2.3 Memory Map SummaryTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-2 s

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www.ti.comPRODUCT PREVIEW7.4.3 EDMA3 Peripheral Register Description(s)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-4. EDMA3 Channel Controll

Strany 5

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-4. EDMA3 Channel Controll

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-4. EDMA3 Channel Controll

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-4. EDMA3 Channel Controll

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-4. EDMA3 Channel Controll

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-5. EDMA3 Parameter RAM (c

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-6. EDMA3 Transfer Control

Strany 11

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-7. EDMA3 Transfer Control

Strany 12

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-8. EDMA3 Transfer Control

Strany 13

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-2. C6454 Memory Map Summa

Strany 14

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-9. EDMA3 Transfer Control

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-9. EDMA3 Transfer Control

Strany 16

www.ti.comPRODUCT PREVIEW7.5 Interrupts7.5.1 Interrupt Sources and Interrupt ControllerTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL

Strany 17

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-10. C6454 DSP Interrupts

Strany 18

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-10. C6454 DSP Interrupts

Strany 19

www.ti.comPRODUCT PREVIEW7.5.2 External Interrupts Electrical Data/Timing21NMITMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – R

Strany 20

www.ti.comPRODUCT PREVIEW7.6 Reset Controller7.6.1 Power-on Reset ( POR Pin)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REV

Strany 21

www.ti.comPRODUCT PREVIEW7.6.2 Warm Reset ( RESET Pin)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006all

Strany 22

www.ti.comPRODUCT PREVIEW7.6.3 System Reset7.6.4 CPU ResetTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006

Strany 23

www.ti.comPRODUCT PREVIEW7.6.5 Reset Priority7.6.6 Reset Controller RegisterTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REV

Strany 24

www.ti.comPRODUCT PREVIEW2.4 Boot Sequence2.4.1 Boot Modes SupportedTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DEC

Strany 25

www.ti.comPRODUCT PREVIEW7.6.7 Reset Electrical Data/TimingTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 200

Strany 26

www.ti.comPRODUCT PREVIEWCLKIN1PCLKRESETRESETSTATSYSREFCLK (PLL1C)Z GroupPORSYSCLK3SYSCLK4SYSCLK5AECLKOUT (Internal)Boot and DeviceConfiguration PinsL

Strany 27

www.ti.comPRODUCT PREVIEWCLKIN1CLKIN2PORRESET(A)(B)RESETSTATBoot andDevice Configuration Pins(C)9768TMS320C6454Fixed-Point Digital Signal ProcessorSPR

Strany 28

www.ti.comPRODUCT PREVIEW7.7 PLL1 and PLL1 ControllerTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006The p

Strany 29

www.ti.comPRODUCT PREVIEW100 1DIVIDER D4CLKIN1(B)PLLEN (PLLCTL.[0])SYSCLK2SYSCLK3AECLKIN (External EMIF Clock Input)EMIFADIVIDER PREDIVDIVIDER D2(A)

Strany 30

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006• SYSCLK4 is used as the internal

Strany 31

www.ti.comPRODUCT PREVIEW7.7.2 PLL1 Controller Memory MapTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006T

Strany 32

www.ti.comPRODUCT PREVIEW7.7.3 PLL1 Controller Register DescriptionsTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DEC

Strany 33

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.7.3.2 PLL Multiplier Control Re

Strany 34

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.7.3.3 PLL Pre-Divider Control R

Strany 35

www.ti.comPRODUCT PREVIEW2.4.2 2nd-Level BootloadersTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006such a

Strany 36

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.7.3.4 PLL Controller Divider 4

Strany 37

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.7.3.5 PLL Controller Divider 5

Strany 38

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.7.3.6 PLL Controller Command Re

Strany 39

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.7.3.7 PLL Controller Status Reg

Strany 40

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.7.3.8 PLL Controller Clock Alig

Strany 41

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.7.3.9 PLLDIV Ratio Change Statu

Strany 42

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.7.3.10 SYSCLK Status RegisterTh

Strany 43

www.ti.comPRODUCT PREVIEW7.7.4 PLL1 Controller Input and Output Clock Electrical Data/TimingCLKIN1234451SYSCLK43442TMS320C6454Fixed-Point Digital Sign

Strany 44

www.ti.comPRODUCT PREVIEW7.8 PLL2 and PLL2 ControllerPLLV2PLL2SYSCLK2 (From PLL1 Controller)SYSCLK1DDR2MemoryControllerEMACCLKIN2(B)(C)C162560 pFEMI F

Strany 45

www.ti.comPRODUCT PREVIEW7.8.1 PLL2 Controller Device-Specific InformationTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVIS

Strany 46

www.ti.comPRODUCT PREVIEW2.5 Pin Assignments2.5.1 Pin MapAGAFAEADACABAAYWVUTR1312111098765432113121110987654321CLKR1/GP[0]HD15/AD15HD2/AD2PGNT/GP[12]H

Strany 47

www.ti.comPRODUCT PREVIEW7.8.2 PLL2 Controller Memory Map7.8.3 PLL2 Controller Register DescriptionsTMS320C6454Fixed-Point Digital Signal ProcessorSPR

Strany 48

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.8.3.1 PLL Controller Divider 1

Strany 49

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.8.3.2 PLL Controller Command Re

Strany 50

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.8.3.3 PLL Controller Status Reg

Strany 51

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.8.3.5 PLLDIV Ratio Change Statu

Strany 52

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.8.3.6 SYSCLK Status RegisterThe

Strany 53

www.ti.comPRODUCT PREVIEW7.8.4 PLL2 Controller Input Clock Electrical Data/TimingCLKIN2234451TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A –

Strany 54

www.ti.comPRODUCT PREVIEW7.9 DDR2 Memory Controller7.9.1 DDR2 Memory Controller Device-Specific InformationTMS320C6454Fixed-Point Digital Signal Proce

Strany 55

www.ti.comPRODUCT PREVIEW7.9.2 DDR2 Memory Controller Peripheral Register Description(s)7.9.3 DDR2 Memory Controller Electrical Data/TimingTMS320C6454

Strany 56

www.ti.comPRODUCT PREVIEW7.10 External Memory Interface A (EMIFA)7.10.1 EMIFA Device-Specific InformationTMS320C6454Fixed-Point Digital Signal Process

Strany 57

www.ti.comPRODUCT PREVIEWAGAFAEADACABAAYWVUTR17 18 19 20 21 22 23 24 25 26 27 28 2917 18 19 20 21 22 23 24 25 26 27 28 29SDAAED27VSSASADS/ASREAED17AHO

Strany 58

www.ti.comPRODUCT PREVIEW7.10.2 EMIFA Peripheral Register Description(s)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED

Strany 59

www.ti.comPRODUCT PREVIEW7.10.3 EMIFA Electrical Data/TimingAECLKIN234451TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISE

Strany 60

www.ti.comPRODUCT PREVIEW4512AECLKINAECLKOUT13 3TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-43

Strany 61

www.ti.comPRODUCT PREVIEWAECLKOUTACExABE[7:0]AEA[19:0]/ABA[1:0]AED[63:0]AAOE/ASOE(A)AR/WAAWE/ASWE(A)AARDY(B)Byte EnablesAddressRead DataHold = 12Strob

Strany 62

www.ti.comPRODUCT PREVIEWAECLKOUTACExABE[7:0]AEA[19:0]/ABA[1:0]AED[63:0]AAOE/ASOE(A)AR/WAAWE/ASWE(A)AARDY(B)Byte EnablesAddressWrite DataHold = 112Str

Strany 63

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.10.3.2 Programmable Synchronous

Strany 64

www.ti.comPRODUCT PREVIEWAECLKOUTACExABE[7:0]AEA[19:0]/ABA[1:0]AED[63:0]ASADS/ASRE(B)AAOE/ASOE(B)AAWE/ASWE(B)BE1 BE2 BE3 BE4Q1 Q2 Q391458967312BE1 BE2

Strany 65

www.ti.comPRODUCT PREVIEWAECLKOUTACExABE[7:0]AEA[19:0]/ABA[1:0]AED[63:0]ASADS/ASRE(B)AAOE/ASOE(B)AAWE/ASWE(B)BE1 BE2 BE3 BE4Q1 Q2 Q31131210421858EA1 E

Strany 66

www.ti.comPRODUCT PREVIEW7.10.4 HOLD/ HOLDA TimingHOLDHOLDAEMIF Bus(A)DSP Owns BusExternal RequestorOwns BusDSP Owns BusDSP DSP132 54AECLKOUTTMS320C64

Strany 67

www.ti.comPRODUCT PREVIEW7.10.5 BUSREQ TimingAECLKOUTx1ABUSREQ1TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER

Strany 68

www.ti.comPRODUCT PREVIEWCDEFGHJKLMNP17 18 19 20 21 22 23 24 25 26 27 28 2917 18 19 20 21 22 23 24 25 26 27 28 29RSV09AED52DVDD33VSSVSSVSSAECLKINAEA9/

Strany 69

www.ti.comPRODUCT PREVIEW7.11 I2C Peripheral7.11.1 I2C Device-Specific InformationTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006

Strany 70

www.ti.comPRODUCT PREVIEWClockPrescaleI2CPSCPeripheral Clock(CPU/6)I2CCLKHGeneratorBit ClockI2CCLKLNoiseFilterSCLI2CXSRI2CDXRTransmitTransmitShiftTran

Strany 71

www.ti.comPRODUCT PREVIEW7.11.2 I2C Peripheral Register Description(s)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED D

Strany 72

www.ti.comPRODUCT PREVIEW7.11.3 I2C Electrical Data/TimingTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006

Strany 73

www.ti.comPRODUCT PREVIEW1084371256142313Stop Start RepeatedStartStopSDASCL111 9TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 –

Strany 74

www.ti.comPRODUCT PREVIEW2523191822272021171828Stop Start RepeatedStartStopSDASCL1626 24TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRI

Strany 75

www.ti.comPRODUCT PREVIEW7.12 Host-Port Interface (HPI) Peripheral7.12.1 HPI Device-Specific Information7.12.2 HPI Peripheral Register Description(s)T

Strany 76

www.ti.comPRODUCT PREVIEW7.12.3 HPI Electrical Data/TimingTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006

Strany 77

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-56. Switching Characteris

Strany 78

www.ti.comPRODUCT PREVIEWHCSHASHCNTL[1:0]HR/WHHWILHSTROBE(A)HD[15:0]HRDY(B)16153713141615371331231238746TMS320C6454Fixed-Point Digital Signal Processo

Strany 79

www.ti.comPRODUCT PREVIEWADEFGHJKLMNP1312111098765432113121110987654321RGRXD2RGTXD3DVDD33MTXD2VSSMTXD0/RMTXD0CVDDMONMTXD6VSSPREQ/GP[15]PINTA/GP[14]MRX

Strany 80

www.ti.comPRODUCT PREVIEWHCSHASHR/WHHWILHSTROBE(A)HD[15:0]HRDY(B)2313791014238121112111211137613133791036HCNTL[1:0]121112111211TMS320C6454Fixed-Point

Strany 81

www.ti.comPRODUCT PREVIEWHCSHASHCNTL[1:0]HR/WHHWILHSTROBE(A)HD[15:0]HRDY(B)3451718171834543837131615141316153735TMS320C6454Fixed-Point Digital Signal

Strany 82

www.ti.comPRODUCT PREVIEWHCSHASHCNTL[1:0]HR/WHHWILHSTROBE(A)HD[15:0]HRDY(B)534171813101293712121111111718141111113710913121212534383536TMS320C6454Fixe

Strany 83

www.ti.comPRODUCT PREVIEW15163241381376HCS (input)HAS (input)HSTROBE(A) (input)HR/W (input)HRDY(B) (output)HD[31:0] (output)HCNTL[1:0] (input)37TMS32

Strany 84

www.ti.comPRODUCT PREVIEW36111012913813236HCS (input)HAS (input)HSTROBE(A) (input)HR/W (input)HRDY(B) (output)HD[31:0] (output)HCNTL[1:0] (input)737TM

Strany 85

www.ti.comPRODUCT PREVIEW171538516131834354HCS (input)HAS (input)HSTROBE(A)(input)HR/W (input)HRDY(B) (output)HD[31:0] (input)HCNTL[1:0](input)37TMS32

Strany 86

www.ti.comPRODUCT PREVIEWHRDY(B) (output)5119171834HAS (input)HR/W (input)HSTROBE(A)(input)HCS (input)353638HD[31:0] (input)HCNTL[1:0](input)10121337T

Strany 87

www.ti.comPRODUCT PREVIEW7.13 Multichannel Buffered Serial Port (McBSP)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED

Strany 88

www.ti.comPRODUCT PREVIEW7.13.1 McBSP Device-Specific InformationTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMB

Strany 89

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-58. McBSP 1 RegistersHEX

Strany 90

www.ti.comPRODUCT PREVIEW2.6 Signal Groups DescriptionTRSTIEEE Standard1149.1(JTAG)EmulationReservedReset andInterruptsControl/StatusTDITDOTMSTCKNMIRE

Strany 91

www.ti.comPRODUCT PREVIEW7.13.2 McBSP Electrical Data/TimingTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20

Strany 92

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-60. Switching Characteris

Strany 93

www.ti.comPRODUCT PREVIEWBit(n-1) (n-2) (n-3)Bit 0 Bit(n-1) (n-2) (n-3)1412111093328765443132CLKSCLKRFSR (int)FSR (ext)DRCLKXFSX (int)FSX (ext)FSX (XD

Strany 94

www.ti.comPRODUCT PREVIEWBit 0 Bit(n-1) (n-2) (n-3) (n-4)Bit 0 Bit(n-1) (n-2) (n-3) (n-4)54387621CLKXFSXDXDRTMS320C6454Fixed-Point Digital Signal Proc

Strany 95

www.ti.comPRODUCT PREVIEWBit 0 Bit(n-1) (n-2) (n-3) (n-4)Bit 0 Bit(n-1) (n-2) (n-3) (n-4)437621CLKXFSXDXDR5TMS320C6454Fixed-Point Digital Signal Proce

Strany 96

www.ti.comPRODUCT PREVIEWBit 0 Bit(n-1) (n-2) (n-3) (n-4)Bit 0 Bit(n-1) (n-2) (n-3) (n-4)54387621CLKXFSXDXDRTMS320C6454Fixed-Point Digital Signal Proc

Strany 97

www.ti.comPRODUCT PREVIEWBit 0 Bit(n-1) (n-2) (n-3) (n-4)Bit 0 Bit(n-1) (n-2) (n-3) (n-4)5437621CLKXFSXDXDRTMS320C6454Fixed-Point Digital Signal Proce

Strany 98

www.ti.comPRODUCT PREVIEW7.14 Ethernet MAC (EMAC)Configuration BusDMA MemoryTransfer ControllerPeripheral BusEMAC Control ModuleEMAC Module MDIO Modul

Strany 99

www.ti.comPRODUCT PREVIEW7.14.1 EMAC Device-Specific InformationTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBE

Strany 100

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-70. EMAC/MDIO Multiplexed

Strany 101

www.ti.comPRODUCT PREVIEWA. This pin functions as GP[1] by default. For more details, see the Device Configuration section of this document.B. These M

Strany 102

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Interface Mode ClockingThe on-chi

Strany 103

www.ti.comPRODUCT PREVIEW7.14.2 EMAC Peripheral Register Description(s)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED

Strany 104

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-71. Ethernet MAC (EMAC) C

Strany 105

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-71. Ethernet MAC (EMAC) C

Strany 106

www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-72. EMAC Statistics Regis

Strany 107

www.ti.comPRODUCT PREVIEW7.14.3 EMAC Electrical Data/TimingMRCLK(Input)2 3144MTCLK(Input)2 3144TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A

Strany 108

www.ti.comPRODUCT PREVIEWGMTCLK(Output)2 3144MRCLK (Input)12MRXD7−MRXD4(GMII only),MRXD3−MRXD0,MRXDV, MRXER (Inputs)TMS320C6454Fixed-Point Digital Sig

Strany 109

www.ti.comPRODUCT PREVIEW1MTCLK (Input)MTXD7−MTXD4(GMII only),MTXD3−MTXD0,MTXEN (Outputs)1GMTCLK (Output)MTXD7−MTXD0,MTXEN (Outputs)TMS320C6454Fixed-P

Strany 110

www.ti.comPRODUCT PREVIEWRMREFCLK(Input)12331RMREFCLK(Input)MTXD1-MTXD0,MTXEN (Outputs)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL

Strany 111

www.ti.comPRODUCT PREVIEWRMREFCLK(Input)123345MRXD1-MRXD0,MCRSDV,MRXER (Inputs)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 –

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www.ti.comPRODUCT PREVIEW1.1.1 ZTZ/GTZ BGA Package (Bottom View)ZTZ/GTZ 697-PIN BALL GRID ARRAY (BGA) PACKAGE(BOTTOM VIEW)A2B1 34567891011121314151617

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www.ti.comPRODUCT PREVIEWACE4(A)AECLKOUTAED[63:0]ACE3(A)ACE2(A)AEA[19:0]AARDYDataMemory Map Space SelectAddressByte Enables6420ExternalMemory I/FContr

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www.ti.comPRODUCT PREVIEWRGREFCLK(Output)23441TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20067.14.3.3 EMA

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www.ti.comPRODUCT PREVIEWRXD[3:0](A)RXCTL(A)RXC(at DSP)(B)5RXERRRXDV61st Half-byte2nd Half-byteRXD[7:4]RXD[3:0]23144TMS320C6454Fixed-Point Digital Sig

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www.ti.comPRODUCT PREVIEWTXC (at DSP)(B)TXD[3:0](A)TXCTL(A)561st Half-byteTXERRTXEN2nd Half-byte12Internal TXCTXC at DSP pins44231TMS320C6454Fixed-Poi

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www.ti.comPRODUCT PREVIEW7.14.4 Management Data Input/Output (MDIO)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECE

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www.ti.comPRODUCT PREVIEW134MDCLKMDIO(input)17MDCLKMDIO(output)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER

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www.ti.comPRODUCT PREVIEW7.15 Timers7.15.1 Timers Device-Specific Information7.15.2 Timers Peripheral Register Description(s)TMS320C6454Fixed-Point Di

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www.ti.comPRODUCT PREVIEW7.15.3 Timers Electrical Data/TimingTINPLxTOUTLx4321TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – RE

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www.ti.comPRODUCT PREVIEW7.16 Peripheral Component Interconnect (PCI)7.16.1 PCI Device-Specific InformationTMS320C6454Fixed-Point Digital Signal Proce

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www.ti.comPRODUCT PREVIEW7.16.2 PCI Peripheral Register Description(s)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED D

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-98. PCI Back End Configur

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www.ti.comPRODUCT PREVIEWMcBSPs(Multichannel Buffered Serial Ports)(B)CLKX0FSX0DX0CLKR0FSR0DR0TransmitMcBSP0ReceiveClockCLKX1/GP[3]FSX1/GP[11]DX1/GP[9

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-98. PCI Back End Configur

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-100. PCI Hook Configurati

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 7-101. PCI External Memory

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www.ti.comPRODUCT PREVIEW7.16.3 PCI Electrical Data/TimingTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006

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www.ti.comPRODUCT PREVIEW7.17 General-Purpose Input/Output (GPIO)7.17.1 GPIO Device-Specific Information7.17.2 GPIO Peripheral Register Description(s)

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www.ti.comPRODUCT PREVIEW7.17.3 GPIO Electrical Data/TimingGPIxGPOx4321TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED

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www.ti.comPRODUCT PREVIEW7.18 IEEE 1149.1 JTAG7.18.1 JTAG Device-Specific Information7.18.2 JTAG Peripheral Register Description(s)7.18.3 JTAG Electri

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www.ti.comPRODUCT PREVIEW8 Mechanical Data8.1 Thermal Data8.2 Packaging InformationTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 200

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www.ti.comPRODUCT PREVIEWRevision HistoryTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006This data sheet r

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006C6454 Revision History (continued

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www.ti.comPRODUCT PREVIEWRGTXCTL, RGRXCTLMRXER/RMRXER,MRXDV,MCRS/RMCRSDV,MCOL,MTXEN/RMTXENEthernet MAC (EMAC) and MDIOMDIOMDCLKMDIOClockClocksError De

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006C6454 Revision History (continued

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006C6454 Revision History (continued

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PACKAGING INFORMATIONOrderable Device Status(1)PackageTypePackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)TMS320C6454BZTZ ACT

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IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,enhancements, improvemen

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www.ti.comPRODUCT PREVIEWHD[15:0]/AD[15:0]HR/W/PCBE2HDS2/PCBE1PCBE0/GP[2]HHWIL/PCLKHINT/PFRAMEPINTA/GP[14]Data/AddressArbitration32ClockControlPCI Int

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www.ti.comPRODUCT PREVIEW2.7 Terminal FunctionsTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006The termina

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006The C64x+ DSP core employs eight

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEW1.3 Functional Block DiagramL2 Memory Controller(Memory Protect/Bandwidth Mgmt)DDR2Mem CtlrSystem(B)C64x+ DSP CoreData Path B

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 2-3. Terminal Functions (co

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www.ti.comPRODUCT PREVIEW2.8 Development2.8.1 Development Support2.8.2 Device SupportTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2

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www.ti.comPRODUCT PREVIEWC64x+t DSP:C6454PREFIXTMX 320 C6454 ZTZTMX = Experimental deviceTMS = Qualified deviceDEVICE FAMILY320 = TMS320t DSP family

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006objective of this document is to

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www.ti.comPRODUCT PREVIEWContentsTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 20061 TMS320C6454 Fixed-Point

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www.ti.comPRODUCT PREVIEW3 Device Configuration3.1 Device Configuration at Device ResetTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 3-1. C6454 Device Configura

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www.ti.comPRODUCT PREVIEW3.2 Peripheral Configuration at Device ResetTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DE

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www.ti.comPRODUCT PREVIEW3.3 Peripheral Selection After Device ResetTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DEC

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www.ti.comPRODUCT PREVIEWResetStaticPowerdownDisabledEnable InProgressEnabledUnlock the PERCFG0 register byusing the PERLOCK register.Write to the PER

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www.ti.comPRODUCT PREVIEW3.4 Device State Control RegistersTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 200

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www.ti.comPRODUCT PREVIEW3.4.1 Peripheral Lock Register DescriptionTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECE

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www.ti.comPRODUCT PREVIEW3.4.2 Peripheral Configuration Register 0 DescriptionTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – R

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 3-7. Peripheral Configurati

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www.ti.comPRODUCT PREVIEW3.4.3 Peripheral Configuration Register 1 DescriptionTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – R

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www.ti.comPRODUCT PREVIEW2 Device Overview2.1 Device CharacteristicsTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DEC

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www.ti.comPRODUCT PREVIEW3.4.4 Peripheral Status Registers DescriptionTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED D

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 3-9. Peripheral Status Regi

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 200631 16ReservedR-015 3 2 0Reserved

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www.ti.comPRODUCT PREVIEW3.4.5 EMAC Configuration Register (EMACCFG) DescriptionTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 –

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www.ti.comPRODUCT PREVIEW3.4.6 Emulator Buffer Powerdown Register (EMUBUFPD) DescriptionTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRI

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www.ti.comPRODUCT PREVIEW3.5 Device Status Register DescriptionTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 3-13. Device Status Registe

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www.ti.comPRODUCT PREVIEW3.6 JTAG ID (JTAGID) Register Description3.7 Pullup/Pulldown ResistorsTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006• Other Input Pins: If the IPU/IP

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www.ti.comPRODUCT PREVIEW3.8 Configuration ExamplesShading denotes a peripheral module not available for this configuration.McBSP0TIMER0EMIFAGPIOPLL2a

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www.ti.comPRODUCT PREVIEW2.2 CPU (DSP Core) DescriptionTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Tab

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www.ti.comPRODUCT PREVIEWShading denotes a peripheral module not available for this configuration.McBSP0TIMER0EMIFAGPIOTIMER1PLL1and PLL1ControllerDDR

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www.ti.comPRODUCT PREVIEW4 System Interconnect4.1 Internal Buses, Bridges, and Switch FabricsTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A –

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www.ti.comPRODUCT PREVIEW4.2 Data Switch Fabric ConnectionsTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 200

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www.ti.comPRODUCT PREVIEWEMACHPIMM128-bit(SYSCLK2)M3M0SMMMMcBSPsSDDR2MemoryControllerSEMIFASPCISMASTERSMBridgeCFGSCRSBridgePCI MEDMA3 ChannelControlle

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www.ti.comPRODUCT PREVIEW4.3 Configuration Switch FabricTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Ta

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www.ti.comPRODUCT PREVIEWMegamoduleMCFG SCRSMMcBSPsSTimersSHPISPCISSBridge7GPIOSEMAC/MDIOMData SCRSSI2CSSPLLControllers(A)SSDeviceConfigurationRegiste

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www.ti.comPRODUCT PREVIEW4.4 Priority AllocationTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006On the C64

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www.ti.comPRODUCT PREVIEW5 C64x+ MegamoduleA register fileData path 1 Data path 2B register fileD2 S2xxxxM2L2Instruction decodeM1xxxxL1 S1 D116/32−bit

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www.ti.comPRODUCT PREVIEW4K bytes8K bytes16K bytesL1P memory00E0 0000h00E0 4000h00E0 6000h00E0 7000h00E0 8000hdirectmappedSRAM1/2dm3/4SRAMSRAM7/8AllSR

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www.ti.comPRODUCT PREVIEW32K bytes32K bytes64K bytes128K bytes792K bytesL2 memory0080 0000h008C 0000h008E 0000h008F 0000h008F 8000h0090 0000h3/4SRAM4-

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Other new features include:• SPLO

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www.ti.comPRODUCT PREVIEW5.2 Memory Protection5.3 Bandwidth ManagementTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED D

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www.ti.comPRODUCT PREVIEW5.4 Power-Down Control5.5 Megamodule ResetsTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DEC

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www.ti.comPRODUCT PREVIEW5.6 Megamodule RevisionTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006The versio

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www.ti.comPRODUCT PREVIEW5.7 C64x+ Megamodule Register Description(s)TMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DE

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 5-4. Megamodule Interrupt R

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 5-8. Megamodule Cache Confi

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 5-8. Megamodule Cache Confi

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 5-8. Megamodule Cache Confi

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 5-9. Megamodule L1/L2 Memor

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Table 5-9. Megamodule L1/L2 Memor

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www.ti.comPRODUCT PREVIEWsrc2src2.D1.M1.S1.L1long srcodd dstsrc2src1src1src1src1even dsteven dstodd dstdst1dstsrc2src2src2long srcDA1ST1bLD1bLD1aST1aD

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www.ti.comPRODUCT PREVIEW6 Device Operating Conditions6.1 Absolute Maximum Ratings Over Operating Case Temperature Range (Unless Otherwise6.2 Recommen

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Recommended Operating Conditions

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www.ti.comPRODUCT PREVIEW6.3 Electrical Characteristics Over Recommended Ranges of Supply Voltage and OperatingTMS320C6454Fixed-Point Digital Signal P

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www.ti.comPRODUCT PREVIEWTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECEMBER 2006Electrical Characteristics Over R

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www.ti.comPRODUCT PREVIEW7 C64x+ Peripheral Information and Electrical Specifications7.1 Parameter InformationTransmission Line4.0 pF 1.85 pFZ0 = 50 Ω

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www.ti.comPRODUCT PREVIEW7.1.3 Timing Parameters and Board Routing Analysis123456781011AECLKOUT(Output from DSP)AECLKOUT(Input to External Device)Cont

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www.ti.comPRODUCT PREVIEW7.2 Recommended Clock and Control Signal Transition Behavior7.3 Power Supplies7.3.1 Power-Supply SequencingDVDD33CVDD12All ot

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www.ti.comPRODUCT PREVIEW7.3.4 Preserving Boundary-Scan Functionality on RGMII and DDR2 Memory PinsTMS320C6454Fixed-Point Digital Signal ProcessorSPRS

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www.ti.comPRODUCT PREVIEW7.4 Enhanced Direct Memory Access (EDMA3) Controller7.4.1 EDMA3 Device-Specific InformationTMS320C6454Fixed-Point Digital Sig

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www.ti.comPRODUCT PREVIEW7.4.2 EDMA3 Channel Synchronization EventsTMS320C6454Fixed-Point Digital Signal ProcessorSPRS311A – APRIL 2006 – REVISED DECE

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