Texas-instruments Digital Signal Processor SM320F2812-HT Uživatelský manuál stáhnout pdf (Strana 2)

SM320F2812-HT

SGUS062B–JUNE 2009 – REVISED JUNE 2011

www.ti.com

Contents

1 Features ........................................................................................................................... 11

1.1 SUPPORTS EXTREME TEMPERATURE APPLICATIONS ......................................................... 12

2 Introduction ...................................................................................................................... 13

2.1 Description ................................................................................................................. 13

2.2 Device Summary .......................................................................................................... 13

2.3 Die Layout .................................................................................................................. 14

2.4 Pin Assignments ........................................................................................................... 15

2.5 Signal Descriptions ........................................................................................................ 16

3 Functional Overview .......................................................................................................... 25

3.1 Memory Map ............................................................................................................... 26

3.2 Brief Descriptions .......................................................................................................... 29

3.2.1 C28x CPU ....................................................................................................... 29

3.2.2 Memory Bus (Harvard Bus Architecture) .................................................................... 29

3.2.3 Peripheral Bus .................................................................................................. 29

3.2.4 Real-Time JTAG and Analysis ................................................................................ 29

3.2.5 External Interface (XINTF) .................................................................................... 30

3.2.6 Flash ............................................................................................................. 30

3.2.7 L0, L1, H0 SARAMs ............................................................................................ 30

3.2.8 Boot ROM ....................................................................................................... 30

3.2.9 Security .......................................................................................................... 31

3.2.10 Peripheral Interrupt Expansion (PIE) Block ................................................................. 32

3.2.11 External Interrupts (XINT1, XINT2, XINT13, XNMI) ........................................................ 32

3.2.12 Oscillator and PLL .............................................................................................. 32

3.2.13 Watchdog ........................................................................................................ 32

3.2.14 Peripheral Clocking ............................................................................................. 32

3.2.15 Low-Power Modes .............................................................................................. 32

3.2.16 Peripheral Frames 0, 1, 2 (PFn) .............................................................................. 33

3.2.17 General-Purpose Input/Output (GPIO) Multiplexer ......................................................... 33

3.2.18 32-Bit CPU Timers (0, 1, 2) ................................................................................... 33

3.2.19 Control Peripherals ............................................................................................. 33

3.2.20 Serial Port Peripherals ......................................................................................... 34

3.3 Register Map ............................................................................................................... 34

3.4 Device Emulation Registers .............................................................................................. 37

3.5 External Interface, XINTF ................................................................................................ 37

3.5.1 Timing Registers ................................................................................................ 39

3.5.2 XREVISION Register ........................................................................................... 39

3.6 Interrupts .................................................................................................................... 40

3.6.1 External Interrupts .............................................................................................. 43

3.7 System Control ............................................................................................................ 44

3.8 OSC and PLL Block ....................................................................................................... 46

3.8.1 Loss of Input Clock ............................................................................................. 47

3.9 PLL-Based Clock Module ................................................................................................ 47

3.10 External Reference Oscillator Clock Option ........................................................................... 47

3.11 Watchdog Block ........................................................................................................... 48

3.12 Low-Power Modes Block ................................................................................................. 49

1 2 3 4 5 6 7 ... 152 153

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